Brochage connecteur MKR VIDOR 4000 - systemes-embarques.fr

SAM	#define	FPGA	J4	J5	Nom	Nom2
PA27	30	CLK0 B1_E2				iCLK
PB9	33	B2_N2				oSAM_INT
PA28	31	B5_L16				iSAM_INT
PA02	15	B1_C2	2		DAC0/A0	bMKR_A[0]
PA04	18	B1_D1	5		A3	bMKR_A[3]
PA05	19	B8_D3	6		A4	bMKR_A[4]
PA06	20	B1_F3	7		A5	bMKR_A[5]
PA07	21	B1_G2	8		A6	bMKR_A[6]
PA08	11	B6_C15		6	11 SDA	bMKR_D[11]
PA09	12	B6_B16		7	12 SCL	bMKR_D[12]
PA10	2	B3_P3	11		-2	bMKR_D[2]
PA11	3	B3_R3	12		-3	bMKR_D[3]
PA16	8	B6_F16		3	8 MOSI	bMKR_D[8]
PA17	9	B6_F15		4	9 SCK	bMKR_D[9]
PA19	10	B6_C16		5	10 MISO	bMKR_D[10]
PA20	6	B6_G16		1	6	bMKR_D[6]
PA21	7	B6_G15		2	7	bMKR_D[7]
PA22	0	B1_G1	9		0	bMKR_D[0]
PA23	1	B3_N3	10		1	bMKR_D[1]
PB02	16	B8_C3	3		A1	bMKR_A[1]
PB03	17	B8_C6	4		A2	bMKR_A[2]
PB10	4	B3_T3	13		-4	bMKR_D[4]
PB11	5	B3_T2	14		-5	bMKR_D[5]
PB22	14	B7_A13		9	14 ← TX	bMKR_D[14]
PB23	13	B7_C11		8	13 → RX	bMKR_D[13]
PA03	25	B1_B1	1		AREF	bMKR_AREF